1. Field of the Invention
The present invention relates to multi-layer printed circuit boards, and more specifically to an internal capacitor structure that provides improved electromagnetic compatibility.
2. Background of the Related Art
Multilayer printed circuit boards are widely used in computer systems for providing interconnections between integrated circuit (IC) chips and other components. As is well known, a multilayer printed circuit board typically comprises a board having a plurality of insulated conductive trace layers, including outer and inner conductive signal trace layers and power and ground planes. Components such as integrated circuits (ICs) are typically mounted on the outer board surfaces and electrically connected to trace layers formed on one or both of the outer surfaces. Interconnections between inner and outer trace layers and to power and ground planes are typically provided using plated-through holes or “vias.”
One of the problems associated with the use of multilayer printed circuit boards is that, during operation, the high speed switching signals can cause high speed fluctuations in the voltage level between the power and ground planes. As a result, it is typical to place capacitors between the power and ground planes in order to provide voltage stabilization. In fact, these capacitors (referred to as electromagnetic compatibility (EMC) capacitors) may be located across the entire external surface area of a printed circuit board.
However, such capacitors have practical high frequency limits of about 1 GHz or less due to the parasitic series inductance of the traces and vias that are used to electrically connect the capacitor between the power and ground layers. Even the inductance that is inherent in these capacitors will reduce the high frequency limit of operation.